In printed wiring boards that transmit electrical signals, with an increase in the frequency of the electrical signals to be transmitted, dielectric loss due to an insulating material disposed around a conductor increases. In view of this, it has been proposed that, in a printed wiring board, a base on which a conductive layer is formed contains, as a main component, a fluororesin having a low dielectric constant and a low dielectric loss tangent (refer to, Japanese Unexamined Patent Application Publication No. 2013-165171).
With the miniaturization of electronic devices, an increase in the wiring density of printed wiring boards has been desired, and thus multilayer printed wiring boards including a plurality of conductive layers are used. In such a multilayer printed wiring board, a via-hole (tubular conductor) that connects conductive layers to each other is formed. A known method for forming such a via-hole includes forming a hole in a printed wiring board, performing electroless plating on an inner circumferential surface of the hole, and then performing electroplating to form a metal layer that connects two or more conducting layers together. A technique has also been proposed in which a layer including conductive fine particles is formed on an inner circumferential surface of a hole of a printed wiring board, and electroless plating and electroplating are then performed (refer to, Japanese Unexamined Patent Application Publication No. 2013-214785).